Stresses inevitably arise in a microelectronic device due to mismatch in coefficients of thermal expansion, mismatch in lattice constants, and growth of materials. Moreover, in the technology of strained silicon devices, stresses have been deliberately introduced to increase carrier mobility. Furthermore, a device usually contains sharp features like edges and corners, which may intensify stresses, inject dislocations into silicon, and lead to failure of the device. Suo has developed a method to create the conditions that avert dislocations, based on the singular stress fields near sharp features. This method will help the design of more robust microelectronic devices.
Zhigang Suo (Mechanical Engineering)
Harvard MRSEC (DMR-0820484)